The present invention relates to integrated circuit semiconductor device test systems, more particularly to a tester and handler interface apparatus that prevents condensation-related short-circuit problems associated with low-temperature semiconductor device testing.
Low-temperature semiconductor device testing is often used to verify the conformance of a semiconductor device with military specifications. During low-temperature testing, semiconductor devices are placed in a handler containing a cool dry environment maintained at a temperature in the range of, e.g., 0xc2x0 C. to xe2x88x9258xc2x0 C. A handler board that includes a contact pad for receiving the cooled semiconductor devices is mounted over an opening in the handler. The handler presses the cooled semiconductor devices against a contact pad. A device tester then transmits test signals to the contact pad through conductive traces formed on the handler board, thereby applying the test signals to the cooled semiconductor devices.
FIG. 1 is an exploded perspective view showing a portion of a prior art low-temperature testing system that utilizes a handler interface described in U.S. Pat. No. 5,705,932, which is incorporated herein by reference. The prior art system generally includes a tester head 10, a handler 20, and a handler interface apparatus 30 that is connected between tester head 10 and handler 20 during low-temperature testing procedures.
Tester head 10 is located at the end of an adjustable arm 12 (partially shown) extending from a semiconductor device tester (not shown), which is an expensive piece of computing equipment for generating and receiving test signals. Wires extend up the adjustable arm from the device tester to a set of metal test pins 15 that extend from tester head 10. During test procedures, the wires are used to transmit test signals to test pins 15, and to transmit response signals received by test pins 15 from a device under test (DUT) to the semiconductor device tester.
Handler 20 includes an insulated box 21 connected to a cooling system, and a device handling mechanism mounted inside of insulated box 21. An opening 22 is provided in a side wall of insulated box 21 through which a contactor pad of handler interface apparatus 30 is exposed to the cool dry environment maintained inside insulated box 21. Device handling mechanism (not shown) is an expensive precise robot including an arm 22 for moving a DUT from a storage location to the contact pad during test procedures. The storage location is also located inside of insulated box 21 so that the DUTs are maintained at a desired low temperature throughout the test procedures.
Handler interface apparatus 30 includes a mother board 40, a handler board 50, and a coplanarity plate 60 that are sandwiched together and connected between test head 10 and handler 20 during low-temperature testing procedures.
Mother board 40 is a printed circuit board (PCB) including a set of test pin contacts 42 and a set of compressible pins 45. Test pin contacts 42 are arranged in groups that correspond to the arrangement of test pins 15 on tester head 10. Each test pin contact 42 includes a metal via that extends through mother board 40 to a corresponding plug located on a bottom surface (not shown) of mother board 40. These plugs are arranged to mate with test pins 15 (most commonly implemented by spring-biased pogo-pins). Compressible pins 45 (e.g., spring-biased pogo-pins) are also arranged in groups and extend from a front surface of mother board 40. Most compressible pins 45 are connected through metal traces (not shown) to corresponding vias of test pin contacts 42. Some compressible pins 45 are connected through corresponding test pin contacts 42 to individual test pins 15 of tester head 10. Some test pin contacts 42 and compressible pins 45 may be ganged together for carrying more current or applying the same signal to more than one compressible pin 45. Finally, threaded apertures (not shown) are spaced around mother board 40 to allow for alignment and connection to handler board 50 (alternatively, a cam lock can be used to connect mother board 40 to handler board 50).
Handler board 50 is also a PCB that includes a set of pin contacts 52 and a central contact pad 55. Pin contacts 52 are arranged in groups that correspond to the arrangement of compressible pins 45 on mother board 40. Each pin contact 52 includes a metal via that extends through handler board 50 to a corresponding contact structure located on a bottom surface (not shown) of handler board 50. These contact structures are arranged to receive the tips of compressible pins 45 when mother board 40 is connected to handler board 50. Contact pad 55 is centrally-located on a front surface of handler board 50, and is adapted to mount DUTs for testing by the device tester. Metallization traces (not shown) extend from pin contacts 52 to associated contact structures of contact pad 55, thereby providing signal paths used during testing procedures. Finally, alignment apertures (not shown) are spaced around handler board 50 to allow for alignment and connection to mother board 40.
Coplanarity plate 60 is a non-electrically conductive plate that provides a stand-off between mother board 40 and handler board 50. Coplanarity plate 60 produces equal compression of all the compressible pins 45 within a fixed range, prevents bending or buckling of the boards, and facilitates the flow of dry gas against a back surface of handler board 50 during low-temperature testing. Coplanarity plate 60 includes a series of outer openings 62, a central opening 65, and a series of radial grooves 67. Outer openings 62 are arranged such that, when coplanarity plate 60 is sandwiched between mother board 40 and handler board 50, the groups of compressible pins 45 on mother board 40 pass through outer openings 62 and press against pin contacts 52 of handler board 50. Central opening 65 is defined by an inner edge of coplanarity plate 60, and forms a dry air chamber when coplanarity plate,60 is sandwiched between mother board 40 and handler board 50. Radial grooves 67 extend along a front surface between the inner and outer edges of coplanarity plate 60. During low-temperature testing, dry air is forced through a selected groove 67 into the chamber defined by central opening 65 from a hose 70.
FIGS. 2(A) and 2(B) are top and side cross-sectional views showing prior art handler interface apparatus 30 in additional detail.
FIG. 2(A) shows the front surface of handler board 50, and indicates the various openings of coplanarity plate 60 in dashed lines. As indicated in FIG. 2(A), compressible pins 45 and pin contacts 52 are aligned with outer openings 62 of coplanarity plate 60. In addition, the dry air chamber defined by central opening 65 is located under contact pad 55 (including device contacts 57) that is mounted on the front surface of handler board 50. Finally, radial grooves 67(1) and 67(2) extend from the outer periphery of coplanarity plate 60 to the dry air chamber defined by central opening 65.
FIG. 2(B) is a cross-sectional view showing coplanarity plate 60 sandwiched between mother board 40 and handler board 50, thereby forming dry air chamber 80. Each compressible pin 45 extending from mother board 40 includes a tip 47 that presses against a pin receiving structure 53 of an associated pin contact 52 of handler board 50. Conductive traces extend along the back surface and through various layers of handler board 50 to contact structures 57 of contact pad 55, thereby providing electrical connections to a DUT (shown as a ball-grid array device).
During low temperature testing, the low temperature of the DUT can cause condensation to form on the back surface of handler board 50. The potential for condensation is particularly high on the back surface of handler board 50 opposite contact pad 55 because of the cold temperatures conducted along contact structures 57 from the cooled DUT. To avoid moisture condensation during low-temperature testing, dry gas is pumped through radial groove 67(1) into chamber 80. The dry gas is allowed to vent, for example, through radial groove 67(2).
A problem with prior art handler interface apparatus 30 is that it is very expensive to construct and maintain. Compressible (pogo) pins 45 are expensive and delicate, and hundreds must be painstakingly mounted and aligned on mother board 40, thereby making mother board 40 very expensive to produce. Damage to or impurities on any compressible pins 45 can result in testing contact errors, and identification and repair of damaged/dirty pins can be very time consuming. Moreover, handler interface apparatus 30 is difficult to assemble due to the required alignment of individual compressible pins 45 with pin receiving structures 53, and because of the collective force exerted by the hundreds of compressible pins 45. Further, handler interface apparatus 30 only supports the two board structure described above (i.e., with mother board 40 sandwiched with handler board 50).
What is needed is a low-cost, easily maintained handler interface apparatus that avoids the problems associated with prior art handler interface apparatus 30.
The present invention is directed to a handler interface apparatus that facilitates low-temperature semiconductor device testing using a single interface board. The handler interface apparatus provides direct contact between the test pins of a device tester and a handler board that is connected to a handler. A dry air chamber is provided over a back surface of the handler board to prevent moisture condensation that can cause electrical leakage and/or electrical short-circuiting that can produce erroneous test data.
In accordance with an embodiment of the present invention, a handler interface apparatus includes a special bracket for mounting a handler board. The bracket including an outer frame, an inner frame connected to the outer frame by two or more arms, and a cover plate positioned over a central opening provided through the inner frame. When the handler board is mounted onto the bracket, conductors extending through the handler board from a device contactor pad are enclosed in a chamber formed by a back surface of the handler board, the walls of the inner frame, and the cover plate.
During low-temperature testing, the handler interface apparatus is incorporated into a system that also includes a handler and a device tester. The bracket is used to secure the handler board to the handler such that the device handler pad is exposed to the cool dry environment contained therein. The handler board is then mated to the test pins of the device tester, which extend through openings located between the inner frame, the outer frame, and the arms of the bracket. Dry gas is pumped into the chamber through conduits formed in the arms of the bracket to prevent the condensation of moisture on the conductors located in the chamber.
In accordance with another embodiment of the present invention, a handler interface apparatus includes a cover plate mounted onto the back surface of a handler board. The cover plate is positioned over a central region of the handler board such that conductors extending through the handler board from a device contactor pad are enclosed in a chamber formed by a back surface of the handler board and the cover plate. During low-temperature testing, dry gas is pumped into the chamber through an opening formed in a wall of the cover plate to prevent the condensation of moisture on the conductors located in the chamber.